Plenary Lecture

Error-Tolerance

Professor Melvin A. Breuer
Charles Lee Powell Professor of Electrical
Engineering and Computer Science tel: 1-213-740-4469
Electrical Engineering-Systems M/C 2562 fax: 1-213-740-9803
University of Southern California room EEB 300C
Los Angeles, California 90089-2562, USA
E-mail: mb@poisson.usc.edu

Abstract: Because of trends in VLSI scaling as well as new technologies such a molecular and quantum electronics, new computational fabrics will emerge that contain a massive number of defects and process aggravated noise and performance problems. In an attempt to obtain useful computation from such devices, designers and test engineers will need to adopt a qualitatively different approach to their work. They will need to learn, enhance and deploy techniques such as fault- and defect-tolerance. For some applications, they may even apply error-tolerance, a somewhat controversial emerging computing paradigm. A circuit is error-tolerant (ET) with respect to an application, if (1) it contains defects that cause external errors, and (2) the application that incorporates this circuit (that outputs some erroneous results) produces acceptable performance. In this talk we illustrate and give quantitative bounds on several factors that will shape the future of error-tolerant digital design. We first show that several large classes of consumer electronic applications are resilient to errors, and how error-tolerance can then be used to significantly enhance effective yield. We then go on to characterize some aspects of erroneous performance, such as error-rate and error-significance, and related issues of testing and binning circuits based on these characteristics. Finally we will address how the level of granularity and reconfigurability along with error-tolerance can impact yield enhancement.

Brief Biography of the Speaker:
Melvin A. Breuer received his Ph.D. in electrical engineering from the University of California, Berkeley, and is the Charles Lee Powell Professor of Electrical Engineering and Computer Science at the University of Southern California. He was Chairman of the Department of Electrical Engineering-Systems from 1991-1994, and again from 2000-2003. He was Chair of the Faculty of the School of Engineering, USC, for the 1997-98 academic year. His main interests are in the area of computer-aided design of digital systems, design-for-test and built-in self-test, and VLSI circuits.
Dr. Breuer is the editor and co-author of Design Automation of Digital Systems: Theory and Techniques, Prentice-Hall; editor of Digital Systems Design Automation: Languages, Simulation and Data Base, Computer Science Press; co-author of Diagnosis and Reliable Design of Digital Systems, Computer Science Press; co-editor of Computer Hardware Description Languages and their Applications, North-Holland; co-editor and contributor to Knowledge Based Systems for Test and Diagnosis, North-Holland; and co-author of Digital System Testing and Testable Design, Computer Science Press 1990 and reprinted in 1995 by the IEEE Press. He has published over 230 technical papers and was formerly the editor-in-chief of the Journal of Design Automation and Fault Tolerant Computing, on the editorial board of the Journal of Electronic Testing, the co-editor of the Journal of Digital Systems, and the Program Chairman of the Fifth International IFIP Conference on Computer Hardware Description Languages and Their Applications. He is a co-author of a paper that received an honorable mention award at the 1997 International Test Conference, a co-author of a paper nominated for the best paper award at the 1998 Design Automation and Test in Europe Conf., a co-author of a paper published in the 1998 International Test Conference that was selected to be in a compendium of significant papers over the last 35 years, and a co-author of the best paper at the 2000 Asian Test Symposium. He is a Life Fellow of the IEEE; was a Fulbright-Hays scholar (1972); received the 1991 Associates Award for Creativity in Research and Scholarship from the University of Southern California, the 1991 USC School of Engineering Award for Exceptional Service, the IEEE Computer Society’s 1993 Taylor L. Booth Education Award, an Okawa Foundation Research Grant in support of research to “Increase the effective yield of VLSI chips via design and test” (2003), and the first (2000) Engineering Faculty Council Award for Outstanding Meritorious Service to the USC School of Engineering. He was the keynote speaker at the Fourth Multimedia Technology and Applications Symposium, 1999; the Ninth Asian Test Symposium, 2000; the International Conference on Computer Design (ICCD), 2004; at the Annual Symposium on VLSI (ISVLSI), 2005; and an invited speaker at the Thirteenth Asian Test Symposium, 2004.
The Test Technology Technical Council of the IEEE Computer Society hosted a forum on October 26, 2006 at the Hyatt Regency Hotel, Santa Clara, California to “celebrate Professor Melvin A. Breuer’s illustrious career and recognize his contributions to VLSI areas of design automation, design for testability, fault tolerance and test; and the influence he had on the industry and academia as an educator and a mentor.”